Nicomsoft - Articles and Technical Information

I2C (Inter-Integrated Circuit) is a multi-master serial computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, or cellphone. I2C uses only two bidirectional open-drain lines, serial data (SDA) and serial clock (SCL), pulled up with resistors. Typical voltages used are +5 V or +3.3 V although systems with other, higher or lower, voltages are permitted. The I2C reference design has a 7-bit address space with 16 reserved addresses, so a maximum of 112 nodes can communicate on the same bus. The most common I2C bus modes are the 100 kbit/s standard mode and the 10 kbit/s low-speed mode, but clock frequencies down to zero are also allowed. Recent revisions of I2C can host more nodes and run faster (400 kbit/s Fast mode and 3.4 Mbit/s High Speed mode), and also support other extended features, such as 10-bit addressing.

I2C is the basis for the VESA Display Data Channel (DDC) interface, it allows to control through the software the settings of a graphical terminal, such as a monitor; with this standard the monitor can directly communicate with the video card. DDC is based on I2C architecture, its advantages are the low cost and its reliability in transmitting the data. The DDC link is carried on three pins – data, clock and ground – in a 15-pin VGA connector, a DVI connector or an HDMI connector. Using DDC, a monitor can inform the video card about its properties, such as maximum resolution and color depth. The video card can then use this information to ensure that the user is presented with valid options for configuring the display.

DDC/CI protocol (CI means "command interface") is an extension to DDC specified by VESA. It allows a computer with a suitably designed graphics adapter to adjust monitor parameters such as brightness and colour balance, or to initiate degaussing.

Extended display identification data (EDID) is a data structure provided by a computer display to describe its capabilities to a graphics card. It is what enables a modern personal computer to know what kind of monitor is connected. EDID is defined by a standard published by the Video Electronics Standards Association (VESA). The EDID includes manufacturer name, product type, phosphor or filter type, timings supported by the display, display size, luminance data and (for digital displays only) pixel mapping data. The EDID is often stored in the monitor in a memory device called a serial PROM (programmable read-only memory) or EEPROM (electrically erasable PROM) that is compatible with the I2C bus.

EDID 1.1 data format

Byte sequence:
00-07: Header information
08-17: Complete serial number
  08-09: Manufacturer ID
  10-11: Product ID Code (little endian)
  12-15: Serial Number (little endian)
  16: Week of Manufacture
  17: Year of Manufacture. Add 1990 to the value for actual year.
18: EDID Version Number
19: EDID Revision Number
20-24: Basic Display Parameters
  20: VIDEO INPUT DEFINITION
    bit 7: 0=analog, 1=digital
    if bit 7 is digital:
      bit 0: 1=DFP 1.x compatible
      if bit 7 is analog:
        bit 6-5: video level
        00=0.7, 0.3, 01=0.714, 0.286, 10=1, .4 11=0.7, 0
        bit 4: blank-to-black setup
        bit 3: separate syncs
        bit 2: composite sync
        bit 1: sync on green
        bit 0: serration vsync
  21: Maximum Horizontal Image Size (in cm).
  22: Maximum Vertical Image Size (in cm).
  23: Display Gamma. Divide by 100, then add 1 for actual value.
  24: Power Management and Supported Feature(s):
    bit 7: standby
    bit 6: suspend
    bit 5: active-off/low power
    bit 4-3: display type.
        00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefined
      bit 2: standard colour space
      bit 1: preferred timing mode
      bit 0: default GTF supported
25-34: CHROMA INFO
  25: low significant bits for Red X (bit 7-6), Red Y (bit 5-4), Green X (bit 3-2), Green Y (bit 1-0).
  26: low significant bits for Blue X (bit 7-6), Blue Y (bit 5-4), White X (bit 3-2), White Y (bit 1-0).
  27-34: high significant bits for Red X, Red Y, Green X, Green Y, Blue X, Blue Y, White X, White Y.
  To decode actual value, rearrange bits as follows:
  High significant bits 7-0 for (channel), low significant bits for (channel).
    Actual value is between 0.000 and 0.999, but encoded value is between 000h and 3FFh.
35: ESTABLISHED TIMING I
    bit 7-0: 720x400@70Hz, 720x400@88Hz, 640x480@60Hz, 640x480@67Hz,
       640x480@72Hz, 640x480@75Hz, 800x600@56Hz, 800x600@60Hz
36: ESTABLISHED TIMING II
  bit 7-0: 800x600@72Hz, 800x600@75Hz, 832x624@75Hz, 1024x768@87Hz(Interlaced),
      1024x768@60Hz, 1024x768@70Hz, 1024x768@75Hz, 1280x1024@75Hz
37: Manufacturer's Reserved Timing
38-53: Standard Timing Identification. 2 bytes for each record.
  First byte
    Horizontal resolution. Multiply by 8, then add 248 for actual value.
  Second byte
    bit 7-6: Aspect ratio. Actual vertical resolution depends on horizontal resolution.
        00=16:10, 01=4:3, 10=5:4, 11=16:9
  bit 5-0: Vertical frequeny. Adds 60 to get actual value.
54-71: Descriptor Block 1
  54-55: Unknown
  56: Unknown
  57: Block type
    FFh=Monitor Serial Number, FEh=ASCII string, FDh=Monitor Range Limits, FCh=Monitor name,
    FBh=Colour Point Data, FAh, Standard Timing Data, F9h=Currently undefined, F8h=defined by manufacturer
  58: Unknown
  59-71: Descriptor block contents.
    If block type is FFh, FEh, or FCh, the entire area is a text string.
    If block type is FDh:
      59-63:
        Min Vertical freqency, Max Vertical freqency,
        Min Horizontal freqency (in kHz), Max Horizontal freqency (in kHz), pixel clock (in MHz)
      64-65: Secondary GTF toggle
        If encoded value is 000A, bytes 59-63 are used. If encoded value is 0200, bytes 67-71 are used.
      66: Start horizontal frequency (in kHz). Multiply by 2 for actual value.
      67: C. Divide by 2 for actual value.
      68-69: M (little endian).
      70: K
      71: J. Divide by 2 for actual value.
    If block type is FBh:
      59: W Index 0. If set to 0, bytes 60-63 are not used. If set to 1, 61-63 are assigned to white point index #1
      64: W Index 1. If set to 0, bytes 65-68 are not used. If set to 2, 65-68 are assigned to white point index #2
      White point index structure:
        First byte
          bit 3-2: low significant bits for White X (bit 3-2), White Y (bit 1-0)
        Second to third byte: high significant bits for White X, White Y.
        Fourth byte: Gamma. Divide by 100, then add 1 for actual value.
        To decode White X and White Y, see bytes 25-34.
    If block type is FAh:
      59-70: Standard Timing Identification. 2 bytes for each record.
        For structure details, see bytes 38-53.
72-89: Descriptor Block 2
90-107: Descriptor Block 3
108-125: Descriptor Block 4
126: Extension EDID Block(s). In EDID 1.1, it is ignored, and should be set to 0.
127: Checksum.

Monitor Control Command Set (MCCS) is the set of commands that allow to control display devices. The purpose of MCCS is to define a universal set of commands to control the screen settings of displays, which can be used within any communication protocol established between the host and display. MCCS is defined by a standard published by the Video Electronics Standards Association (VESA).

How WinI2C/DDC works

Windows 2000 and Windows XP have undocumented API that supports DDC/CI. This solution is very limited because the graphics display driver must support this undocumented API, this is rarely done today. We have created a second method that communicates with video chips directly, this approach enables the I2C communication on graphic controllers that are not currently supported by Micrsofot API and works under Windows Vista operating system.

WinI2C/DDC uses both these methods in order to achieve the broadest compatibility. It detects the video chip type and selects appropriate way for I2C bus accessing. Almost all video chips manufacturers have own set of parameters for accessing I2C, sometimes even one manufacturer uses different parameters for I2C accessing for different generations of video chips. Everytime WinI2C/DDC will select appropriate method, but you will be able to use same API and will not feel any difference at all.

Links

VESA Main Page
VESA Standards Summaries
Philips I2C Specifications

Keywords

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